Features
Power_electronics Features

Edge Computing Leverages Modular Power in Scalable Micro Data Centres - May 2022
Edge computing is essential to realizing the full potential of artificial intelligence (AI), machine learning and internet of things (IoT). These technologies are being infused into every corner of...
More details...
Power Electronics Europe News
 
Flexible 150/200 mm SiC Epitaxy CVD

AIXTRON SE launched its new G10-SiC 200 mm system for high volume manufacturing of latest generation Silicon Carbide (SiC) power devices on 150/200 mm wafers. This high temperature CVD system, bringing innovation to the next level, was just announced at the International Conference on Silicon Carbide and Related Materials (ICSCRM) in Davos, Switzerland.

The wide-band-gap material is set to become mainstream technology for efficient power electronics. SiC substantially contributes to the decarbonization of our modern society and therefore supports climate protection. Driven by the growing adoption of SiC based power semiconductors within electromobility solutions, the worldwide demand for SiC wafers is growing rapidly, further accelerated by the motivation to reduce dependency towards oil supply.

The G10-SiC supports a large variety of device structures including single and double drift layer structures meeting stringent 150 mm uniformity requirements of sigma values less than 2 % for doping and thickness. The automated wafer loading reduces the risk of particle defects, resulting in typical defect counts of < 0.02/cm². “This is a truly new generation high-performance system. The new dual wafer size configuration fully supports the transition from today’s 150 mm wafer technology and safeguards the investments of our customer for the future. With the highest throughput available to date in this form factor, it maximizes fabs productivity and capability to ramp even faster”, said Dr. Frank Wischmeyer, Vice President SiC of AIXTRON. “At the same time, the newly developed in-situ top side wafer temperature control (TTC) solution optimizes the wafer-level process control within a batch as well as from batch-to-batch. This results in predictable high yields meeting tight production specifications at competitive cost levels”.

Epitaxial layer uniformity is essential to meet a high yield on device level. The high throughput of the system paired with low consumption costs per processed wafers results in the lowest cost per wafer in the industry. The new G10-SiC system is built on the established G5 WW C 150 mm platform and provides a flexible dual wafer size configuration of 9 mm x 150 mm & 6 mm x200 mm. This feature is instrumental for the transition of the SiC industry from 150 mm (6 Inch) to 200 mm (8 Inch) wafer diameter. AS

www.aixtron.com



 
Go Back   
Newsletter sign up

Sponsors