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Power Electronics Europe News
Five output digital voltage regulator targets high-density ASICs and FPGAs

The regulator has been developed as an integrated PMIC, replacing multiple regulators with a single device in a compact, 56-pin QFN package, measuring 7.0 x 7.0mm.

It is suitable for current and future applications in high density ASIC and FPGAs, says the company, as well as in CPU multi-rail systems, embedded computing systems, and communication and storage systems.

The IRPS5401 is designed for single rail operation from 5.0 to 12V (most PMICs are 5.0V, points out the company). It has one 500mA LDO output, and four configurable switching regulator outputs, two at 2.0, and two at 4.0A. The outputs can be used to provide the typical rails required for core, memory, and I/O voltages. The voltage output range is between 0.5 and 3.6V for regulators A to D, and between 0.25 and 5.1V for the LDO.

Switching regulator A can output up to 50A, if combined with an external power stage. Switching regulators C and D can be combined to deliver 8.0A in a low ripple, dual-phase configuration. All outputs range between 10 to 50W, including integrated voltage sequencing, which is within the power requirements of most FPGAs and ASICs, says the company. Industry standard PMBus commands provide an easy-to-use interface for status and telemetry. PMBus can also configure the output voltages in 5.0mV steps.

The IRPS5401 is available now and is used in Avnet’s UltraZed system on module (SoM). “With the integration level and excellent power density of the IRPS5401, we were able to implement two IRPS5401 devices onto our full-featured UltraZed SoM,” said Chris Ammann, global technical marketing engineer for power at Avnet. “This gives us 10 rails that can be fully monitored and controlled with software, while maintaining a business card size footprint for the SoM,” he adds.




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